SEQUENTIAL CIRCUIT #2 – SR LATCH

OVERVIEW

The SR Latch is a basic sequential circuit that introduces the idea of memory. We will see that we can no longer use a traditional truth table to explain the states of these circuits because the outputs rely on the inputs but also on their own previous state.

IMPLEMENTATION

There are two implementations of the SR Latch. One is done with two NOR gates. The other is done with two NAND gates. We will focus on the NOR-gate implementation but you can easily find the NAND-gate implementation on the internet.

NOR GATE IMPLEMENTATION

TRUTH TABLE ANALYSIS

The truth table analysis is a little messy. I’ve elaborated on a separate page. Click here to see it.

PROJECT EXPECTATIONS

You will implement a NOR SR latch (or a NAND SR latch if you prefer). You will have to show Mr. Campeau that you understand how this can be used for memory.